物联网与人工智能研究院硬件专家

  • Posted on: 12 April 2016
  • By: liepin
Posted on: 
April 12,2016
Contract Type: 
City: 

 

1.  负责光学成像系统设计.

2.  完成样机装调与技术指标的测试工作.

3.  负责编写相关技术文件.

任职要求:

1.   硕士及以上学历,电子、计算机等相关专业.

2. 7 年以上 FPGA 相关工作经验.

3.  精通 Verilog 语言和时序约束、时序分析、时序优化方法.

4. 熟练使用 ISE、Modlesim、Vivado、Matlab 等相关 FPGA 及算法开发工具.

5. 具备图像处理、音视频算法实现经验者、System C 或者 System Verilog 系统仿真工 作经验者优先.

Responsibilities:

1.     Responsible for system architecture design, algorithm validation, IP design, code emulation.

2.   Responsible for function modules and interface design, documentation and code.

3.   Responsible for timing analysis, debug and verify on board, communication with circuit engineers for debugging.

4.   Responsible for embedded chip driver development, such as SCM, ARM and etc.

Requirements:

1. The candidate should at least have master degree. Majored in electronic, computer and other relevant areas.

2.  7+ years of working experience in FPGA.

3.   Mastery Verilog, timing constraint, timing analysis, timing optimization method.

4.   Skilled in using ISE, Modlesim, Vivado, Matlab and other relevant FPGA and algorithm development tools.

5.   Having  working  experience  of  image  processing,  audio  and  video  algorithm accomplish, System C or System Verilog system simulation will be a plus.